Analog Very Large Scaled Of Integration (VLSI) Testing And Analysis Of Combinational Circuits Using Computer-Aided Design (CAD) Tools

Abstract

This project is to perform Analog Very Large Scaled of Integration (VLSI) testing and the analysis of combinational circuits using Computer-Aided Design (CAD) tools. The primary objective is to analyze the outputs of the combinational circuits to their inputs by using analog concept in order to study the effects of the parametric variation of the circuits to their performance. The circuits used in the project are simple circuits (NOT, AND, OR, NOR and NAND gates) and complex circuits (half-adder and 2-to-4 decoder). The project can be used to detect the defective analog VLSI devices with the analysis perform. The simulation on the combinational circuits is implemented in Multisim using fault model based testing while the analysis is performed using Matlab. The fault free output waveform of the analog combinational circuits is compared with the faulty circuit. With the simulation results and the waveform plotted on the Matlab graphical user interface (GUI), the circuits are analyzed to explain the reasons of obtaining faulty outputs. Besides that, the GUI is used as interface for users to explore and understand the analog combinational circuit testing.